Previously, a semiconductor device having a resistance element and a field effect transistor formed on one semiconductor substrate has been developed. For example, JP-A 11-238807 (Kokai) (1999) discloses a technique forming a resistance element using a well formed immediately below an element isolation insulating film.
However, in the technique disclosed in JP-A 11-238807 (1999), independent design is not allowed for a well forming a resistance element and a well forming a channel region of a field effect transistor. Therefore, for example, in case an impurity concentration of the well is reduced to increase a resistivity in order to shrink the resistance element, a resistivity of the well of the field effect transistor also increases and latch-up characteristics are deteriorated. On the other hand, in case the impurity concentration of the well of the field effect transistor is increased and the resistivity is reduced, the resistivity of the resistance element is also reduced and the resistance element size becomes larger.